🧪 Module 2 · Chemistry and Materials Science · Chapter 2.7 · 12 min read

CMP and the SOG Alternative

Keeping the wafer atomically flat — the dance of chemistry and mechanics.

What you'll learn here

  • Explain why CMP (Chemical Mechanical Polishing) is non-negotiable for BEOL
  • Identify the components of a CMP slurry (abrasive + oxidizer + inhibitor)
  • Compute removal rate with the Preston equation
  • Distinguish the copper damascene flow from tungsten etch-back
  • Say when SOG (Spin-On-Glass) can substitute for CMP

Hook: Why the Wafer Must Be Flat

Picture a lithography step: 193 nm light, 50 nm depth of focus (DOF). If the wafer surface rolls over a 100 nm bump, half your image is in focus, half is not. The feature distorts and a transistor dies.

A modern chip stacks 10-20 metal layers, each on top of the last. If each layer is even 10 nm per mm rough, that’s 100 nm of accumulated roughness by layer 10 — lithography collapses. So after every layer, CMP: Chemical Mechanical Polishing. Two forces at once:

  • Mechanical: abrasive (silica/alumina particles) + pressure + rotation → grinds high spots down.
  • Chemical: slurry components transform the surface into a soft skin → the abrasive removes it far more easily.

SIDRA needs CMP after every Cu metal layer. Copper has no plasma etch (Chapter 2.6) — instead, damascene: etch the oxide, fill with Cu, CMP away the overburden.

Intuition: Hard Particle + Soft Surface

Pure mechanical polish (abrasive + pressure, no chemistry):

  • Scratches the surface.
  • Each metal removes at a different rate → uncontrollable.
  • Particles embed into the wafer.

Pure chemical etch (Chapter 2.6):

  • No anisotropy, patterns deform.
  • Erodes vertical walls too.

CMP is the meeting point: chemistry converts only the top 1-5 nm into a reactive species (e.g. Cu → CuO). The mechanical step grinds that oxide away. Fresh Cu is exposed underneath → oxidizes again → gets ground. This dynamic equilibrium is highly selective: only high spots get removed; Cu inside trenches is untouched.

Result: ±2 nm within-wafer uniformity on a 300 mm wafer.

Formalism: The Preston Equation and Slurry Chemistry

L1 · Başlangıç

Preston equation: the simplest CMP removal-rate model.

RR=kpPv\mathrm{RR} = k_p \cdot P \cdot v
  • RR\mathrm{RR} — removal rate (nm/min)
  • kpk_p — Preston coefficient (specific to material + slurry)
  • PP — downforce pressure (psi)
  • vv — relative velocity (pad + head)

For SIDRA Cu CMP: P=3P = 3 psi, v=1v = 1 m/s, kp200k_p \approx 200 nm·psi⁻¹·s·m⁻¹ → RR ≈ 600 nm/min.

L2 · Tam

Cu slurry composition:

ComponentRoleTypical concentration
Alumina or silica particleMechanical abrasive3-5%, 80-150 nm diameter
H₂O₂ (hydrogen peroxide)Oxidizer: Cu → Cu₂O → CuO1-5%
BTA (benzotriazole)Corrosion inhibitor — protects trench Cu0.1-0.5%
Citric or glycine acidComplexing agent — carries CuO away1-3%
pH adjuster (KOH/HNO₃)Tune pH 4-8variable

The damascene flow (Cu metallization):

  1. Grow dielectric (SiO₂ / low-k) by ALD/CVD.
  2. Litho + etch: open trenches + vias (Chapters 2.5 + 2.6).
  3. Barrier layer: TaN/Ta (5 nm) PVD — prevent Cu diffusion.
  4. Cu seed: 5-10 nm PVD.
  5. ECP (electrochemical plating): fills trenches with excess Cu.
  6. CMP: remove excess Cu + barrier. Pure Cu remains in the trench.

This “inlaid” Cu structure was pioneered by IBM in 1997; it’s now the industry standard.

Key CMP problems:

  • Dishing: broad Cu features form a center dip — slurry eats too much.
  • Erosion: in dense patterns, SiO₂ between Cu lines erodes.
  • Residual particles: slurry leaves particles on the wafer → shorts downstream. Post-CMP clean is critical.

Within-wafer uniformity: edge-center variation < 3% on a 300 mm wafer. Tuned via pad dressing, head oscillation, and slurry dispense.

L3 · Derin

Tungsten (W) vs Cu CMP:

For tungsten contacts (lowest BEOL layer): W + H₂O₂ → WO₃ (solid). WO₃ is water-soluble; slurry carries it off.

Difference from Cu: W CMP runs at pH 2-4 (acidic); Cu CMP at pH 6-8 (mildly acidic/basic).

Low-k dielectrics (ULK): SiOCH (SiO₂ with methyl groups), ε ≈ 2.5. Mechanically weak — CMP pressure must stay low (< 2 psi). Otherwise voids open (delamination).

Electro-CMP (eCMP): electrical current oxidizes Cu instead of slurry chemistry. Pressure 10× lower → no low-k damage. Research since IBM 2006.

Atomic Layer CMP (ALCMP): one monolayer per cycle. Pulsed slurry + timing control. Not yet commercial but a candidate for the 2 nm node.

Pad chemistry: polyurethane, two-layer. Hard top (IC1000), soft bottom (SubaIV). Groove pattern for slurry distribution. Pad life ~8 hours, then “conditioning” (diamond disk refreshes the surface).

Endpoint detection: RF impedance over the pad (metal → dielectric transition shifts impedance) or optical reflectometry. ±5 s precision.

Experiment: Play with the Preston Equation

Thought experiment. For SIDRA Cu CMP:

  • kp=200k_p = 200 nm·psi⁻¹·s·m⁻¹
  • P=3P = 3 psi
  • v=1v = 1 m/s

(a) RR? → 200×3×1=600200 \times 3 \times 1 = 600 nm/min. (b) Double the pressure? → 1200 nm/min. But low-k delamination risk ↑. (c) Halve the velocity? → 300 nm/min. Throughput ↓, uniformity ↑. (d) 500 nm overfill Cu — time? → 500/600 ≈ 50 s. 20% over-polish → 60 s.

Caveats: Preston is a linear model. In practice:

  • As dishing grows, effective pressure drops → RR decreases (self-limiting).
  • Slurry ages, H₂O₂ depletes → RR drops.
  • Pad wears → RR drifts.

Production tools use endpoint sensors to adjust time dynamically.

Quick Quiz

1/5Role of the 'Chemical' in CMP?

Lab Exercise

For SIDRA’s 7th metal layer, Cu CMP: remove 500 nm overfill. A 100 nm TaN barrier sits below.

Parameters: kp=200k_p = 200 nm·psi⁻¹·s·m⁻¹ (Cu), kp=50k_p = 50 (TaN), P=3P = 3 psi, v=1v = 1 m/s.

(a) How many seconds to remove Cu? (Preston) (b) How many seconds to remove the TaN barrier? (same parameters, different kpk_p) (c) Total time? (d) What happens with no endpoint sensor? (e) If low-k safety caps pressure at 2 psi, what’s the new RR and total time?

Answers

(a) RR_Cu = 200 × 3 × 1 = 600 nm/min = 10 nm/s. Nominal 500 nm → 50 s. With a 20% over-polish margin → 60 s.

(b) RR_TaN = 50 × 3 × 1 = 150 nm/min = 2.5 nm/s. Nominal 100 nm → 40 s. No over-polish on the barrier step (too risky).

(c) Total (Cu 20% over-polish + TaN nominal): 60 + 40 = 100 s (~1.7 min).

(d) Without endpoint detection, when Cu clears the tool keeps grinding TaN slowly — but if it breaks through to the SiO₂ dielectric beneath, dishing & erosion deepen. Calibration or RF impedance sensing is mandatory.

(e) P=2P = 2 psi: RR_Cu = 400 nm/min, RR_TaN = 100 nm/min. Same over-polish rule (Cu 20% + TaN nominal): Cu 500/400 min × 1.2 × 60 s/min = 90 s, TaN 100/100 min × 60 s/min = 60 s, total 150 s (~2.5 min). ~50% slower than nominal pressure, but low-k safe. Classic throughput vs reliability tradeoff.

Cheat Sheet

  • CMP: chemistry (softening) + mechanics (abrasive + pressure) = selective, uniform planarization.
  • Preston: RR=kpPv\mathrm{RR} = k_p \cdot P \cdot v. Linear in model, dynamic with endpoint in production.
  • Slurry components: abrasive + oxidizer (H₂O₂) + inhibitor (BTA) + complexant + pH buffer.
  • Damascene: etch → fill with Cu → CMP. The only way for copper. IBM 1997.
  • Hazards: dishing (wide features), erosion (dense patterns), low-k delamination.
  • SOG: liquid glass, self-planarizing. Rare in modern chips; niche gap-fill cases.

Vision: The Future of Planarization

  • Electro-CMP (eCMP): no slurry, electrical oxidation. 10× lower pressure — low-k friendly.
  • Slurry-free dry polishing: plasma + mechanical. No liquid, lower environmental impact.
  • ALCMP (Atomic Layer CMP): pulsed slurry, 1 Å per cycle. Critical at 2 nm and below.
  • Cryogenic CMP: -40°C pad → less thermal deformation, better uniformity.
  • Bio-inspired slurry: enzyme + nanoparticles; 10× more selective on organic resists.
  • CMP-free flow: etch-back + reflow anneal instead of damascene. Used in 3D NAND.
  • In-situ AFM endpoint: atomic force microscopy live on the wafer → ±0.3 nm precision.
  • Quantum-dot abrasive: size-controlled nanoparticles for uniform RR.

Biggest lever for post-Y10 SIDRA: an eCMP + ALCMP hybrid. Use eCMP on Cu metallization layers (low-k safety), ALCMP for memristor-stack finishing (atomic control). Yield up ~15%, Cu barrier integrity up ~30%. 2027–2030 horizon.

Further Reading

  • Next chapter: 2.8 — Metallization: Tungsten vs Copper
  • Previous: 2.6 — Plasma Etching
  • Classic: Steigerwald, Murarka, Gutmann, Chemical Mechanical Planarization of Microelectronic Materials, Wiley 1997.
  • Preston original: F. W. Preston, The Theory and Design of Plate Glass Polishing Machines, 1927.
  • Damascene: Andricacos et al., Damascene copper electroplating for chip interconnections, IBM J. Res. Dev. 1998.
  • eCMP: Economikos et al., Electrochemical CMP for copper planarization, Proc. IITC 2006.