🧠 Module 3 · From Biology to Algorithm · Chapter 3.1 · 14 min read

Neuron Biology

86 billion cells, 20 watts — why SIDRA is trying to borrow this architecture.

Prerequisites

What you'll learn here

Name the four parts of a neuron (dendrite, soma, axon hillock, axon) and what each one does
Recall the resting potential (-70 mV), threshold (-55 mV), spike peak (+30 mV) and the 1-2 ms timescale
Write the Leaky Integrate-and-Fire (LIF) model in a single equation and step through a simulation
Estimate the energy of a single spike and compare it to a SIDRA cell

Hook: A 20-Watt Supercomputer

The human brain holds about 86 billion neurons (Herculano-Houzel, 2009). Together they run hundreds of trillions of synaptic operations per second, and they do it on roughly 20 watts. The same power as an LED bulb.

Compare: a single NVIDIA H100 GPU draws 700 W. Training GPT-3 consumed an estimated 1287 MWh of electricity (Patterson et al., 2021). With that much energy, one human brain could run continuously for ~7 years.

Closing that gap starts with understanding the brain. SIDRA Y1’s 419 million memristors don’t imitate a neuron directly — they copy one brain trick (the analog synapse). This chapter lays the biology you need to understand that trick: how a neuron works, at what timescale, and why it uses so little energy.

Intuition: Four Parts, One Job

A neuron’s job in one sentence: sum up incoming signals, fire a spike if you cross threshold, pass it on. Four parts:

Part	Role	Size
Dendrites	Collect incoming signals (inputs)	1-10 µm thick, tree-like branches
Soma (cell body)	Decision center; the nucleus lives here	10-30 µm diameter
Axon hillock	Threshold comparator — spike starts here	Junction between soma and axon
Axon	Output wire, propagates the spike	1 mm to 1 m (!)

Analogies:

Dendrites = GPU input bus. Thousands of signals arrive.
Soma = summer. Behaves like an analog summing amplifier.
Axon hillock = comparator. Asks “is V > V_thr?”
Axon = transmission line — but not digital. The spike propagates by regenerating itself.

Why spikes? Over long distances, analog signals decay (RC delay, chapter 1.6). A spike is a self-regenerating event: Na⁺/K⁺ channels rebuild it every 1-2 mm. Analog flexibility (graded values) stays in the dendrites; the axon runs all-or-nothing. The brain is an analog + digital hybrid. SIDRA takes its inspiration here.

Formalism: Membrane Voltage and the Spike

L1 · Başlangıç

Resting state: a neuron’s inside is about −70 mV more negative than its outside. The Na⁺/K⁺ pump (burning ATP) holds this imbalance by pushing ions across the membrane.

What happens on input:

Dendrites receive excitations that drive the membrane voltage up (depolarization).
If V crosses the −55 mV threshold at the axon hillock, Na⁺ channels snap open.
The inside races up to +30 mV — the spike peak.
K⁺ channels open late and pull V back down.
A refractory period of a few ms — the system rests, then another spike is possible.

Full cycle: ~1-2 ms. Cortical neurons typically fire at 1-100 Hz (average low, ~1 Hz).

L2 · Tam

Leaky Integrate-and-Fire (LIF) model:

Compresses the biology’s complexity into the simplest working equation:

\tau_m \frac{dV}{dt} = -(V - V_{\text{rest}}) + R_m \cdot I(t)

$V$ — membrane voltage (mV)
$V_{\text{rest}}$ — resting voltage (−70 mV)
$\tau_m = R_m C_m$ — membrane time constant (~10-20 ms)
$R_m$ — membrane resistance (~10-100 MΩ)
$I(t)$ — input-driven ionic current

Spike rule: when $V$ crosses threshold (−55 mV), emit a spike, reset $V$ to $V_{\text{reset}}$ (−80 mV), hold for 2 ms refractory.

This is an RC circuit (chapter 1.6): membrane capacitor $C_m$ , membrane resistor $R_m$ , a leaky integrator. Neuron = leaky integrator + comparator.

Worked example:

Input $I = 2$ nA, $R_m = 50$ MΩ → $V_{\infty} = V_{\text{rest}} + R_m I = -70 + 100 = 30$ mV (above threshold).
$\tau_m = 15$ ms → time to reach threshold $\approx 15 \cdot \ln(100/85) \approx 2.4$ ms.

So this input causes the neuron to fire at ~2.4 ms. Real cortical neurons live at this scale.

L3 · Derin

Hodgkin-Huxley model (1952):

LIF is a cartoon. A real action potential is driven by two ion channels:

C_m \frac{dV}{dt} = -g_{Na} m^3 h (V - E_{Na}) - g_K n^4 (V - E_K) - g_L (V - E_L) + I

$m, h, n$ — channel activation/inactivation gating variables (0-1 range, voltage-dependent ODEs)
$g_{Na}, g_K$ — maximum ionic conductances
$E_{Na} = +55$ mV, $E_K = -90$ mV — Nernst equilibrium potentials

Hodgkin and Huxley measured this in the squid giant axon → 1963 Nobel Prize. The takeaway for SIDRA: Na⁺ is positive feedback (voltage rises faster), K⁺ is negative feedback (voltage comes back down). The race between positive and negative feedback shapes the spike.

Refractory period:

Absolute refractory (~1-2 ms): h (Na inactivation) is closed → no new spike at any input.
Relative refractory (~5-10 ms): K channels still open → threshold higher.

This caps a single neuron at ~500-1000 Hz max firing rate. Slow cortical neurons live at 1-100 Hz.

Spike-timing precision: a cortical neuron can time its spike to sub-ms accuracy. Information rides on both rate (firing rate) and timing (spike timing). Chapter 3.8 (STDP) explains how timing is exploited for learning.

Energy budget:

A single spike involves ~10⁹ Na⁺/K⁺ ion exchanges; each ion costs ATP to pump back.
Energy per spike: ~0.1-1 nJ (varies by neuron, average ~0.3 nJ).
Average cortical firing rate ~1 Hz → 86B × 0.3 nJ ≈ 26 W. Right order (actual 20 W; non-spike leakage and vesicle recycling bring the rest).

Experiment: Simulate One LIF Neuron

Inject 2 nA of constant current into an LIF neuron for 50 ms. Parameters:

$V_{\text{rest}} = -70$ mV, $V_{\text{thr}} = -55$ mV, $V_{\text{reset}} = -80$ mV
$R_m = 50$ MΩ, $\tau_m = 15$ ms, refractory 2 ms

Euler steps (dt = 0.1 ms):

$t = 0$ : $V = -70$ mV
$dV/dt = [-(V - V_{\text{rest}}) + R_m I] / \tau_m = [0 + 50 \cdot 10^6 \cdot 2 \cdot 10^{-9}] / 15 \text{ ms} = 100 / 15 = 6.67$ mV/ms
$t = 0.1$ ms: $V = -70 + 0.667 = -69.3$ mV
… (simulation continues) …
$V$ crosses −55 mV around $t \approx 2.4$ ms → spike! $V \to -80$ mV, hold 2 ms.
After refractory, ramp resumes. Next spike ~10-12 ms later.

Result: this neuron fires at ~90-100 Hz under this input. 4-5 spikes in 50 ms.

Change: halve the current (1 nA). $V_{\infty} = -70 + 50 = -20$ mV still above threshold, but slower → neuron fires at ~30 Hz.

Change: drop the current to 0.3 nA. $V_{\infty} = -70 + 15 = -55$ mV — right at threshold (slightly below) → the neuron never fires (V just dances near threshold). This is the “rheobase” current — the minimum input that triggers firing.

Tie to SIDRA: the total current in a crossbar column is $I_{\text{col}} = \sum V_i G_{ij}$ . If you feed that current into an LIF-analog integrator, you get spikes out. SIDRA Y100’s target adds “LIF neuron circuits” to every crossbar column.

Quick Quiz

1/6Where in a neuron does the action potential start?

Lab Exercise

Scale-compare SIDRA Y1’s 419M cells against brain biology.

Data:

SIDRA Y1: 419 × 10⁶ memristor cells, TDP = 3 W
Memristor SET energy: ~10 pJ (typical HfO₂)
Read energy: ~0.1 pJ
Brain: 86 × 10⁹ neurons, 10¹⁴-10¹⁵ synapses, 20 W, ~1 Hz avg
Per-spike energy ~0.3 nJ; per-synaptic-event energy ~0.1-1 fJ (different metric)

Questions:

(a) What fraction of brain neurons is Y1’s cell count? Of synapses? (b) Y1 at full-throttle reads (every 100 ns all cells), ops/sec? Energy? (c) Total synaptic operation rate in the brain? (1 Hz avg, 7000 synapses/neuron) (d) Y1 synaptic-ops/joule vs brain — what ratio? (e) Y10 target 1 × 10¹⁰ cells (~24× Y1). How close does it get, at the same per-op energy?

Solutions

(a) Neuron ratio: 419M / 86B = ~0.49%. Synapse ratio: 419M / 10¹⁴ = 0.00042% ≈ 4 parts per million. Memristors map to synapses more than neurons; Y1 is still a long way from biology.

(b) At 10 MHz read (100 ns cycle) → 419M × 10⁷ = 4.19 × 10¹⁵ ops/s = 4.19 POPS. Energy: 419M × 10⁷ × 0.1 pJ = 419 W. Well above the 3 W TDP — in practice activity factor α ≈ 0.7% keeps it in budget. 0.007 × 419 W ≈ 3 W.

(c) 86B × 1 Hz × 7000 = 6 × 10¹⁴ synaptic events/s. Y1 at α=0.7% gives 4.19 × 10¹⁵ × 0.007 = 2.9 × 10¹³ ops/s. Brain runs ~20× faster in synaptic ops.

(d) Y1 efficiency: 2.9 × 10¹³ ops/s / 3 W = ~10 TOPS/W. Brain efficiency: 6 × 10¹⁴ / 20 = 30 TOPS/W. Brain is ~3× better (the units aren’t exactly comparable — synaptic-event vs MAC). Digital AI hardware runs around 1 TOPS/W → SIDRA already beats it ~10×.

(e) Y10 is 24× Y1. Same per-op efficiency → 24 × 10¹³ ops/s = 2.4 × 10¹⁴. That’s about 40% of brain. Y100 (target 10¹¹ cells) reaches brain scale. But energy: Y10 TDP ~30 W, Y100 ~100 W — still 5× over the brain’s 20 W. Energy efficiency is the hardest part.

Cheat Sheet

Neuron in 4 parts: dendrite (input), soma (decision), axon hillock (comparator), axon (output).
Membrane voltages: rest −70 mV, threshold −55 mV, peak +30 mV, reset −80 mV.
Spike duration: 1-2 ms; refractory 2 ms absolute, 5-10 ms relative.
LIF model: $\tau_m dV/dt = -(V-V_{\text{rest}}) + R_m I$ + threshold rule. Neuron = leaky integrator + comparator.
Hodgkin-Huxley: Na⁺ (positive feedback) + K⁺ (negative) = spike shape.
Brain: 86B neurons, ~20 W, ~1 Hz avg → 10¹⁴-10¹⁵ synaptic ops/s.
Spike energy: ~0.1-1 nJ (per spike); synaptic event ~0.1-1 fJ.
SIDRA ties: Y1 419M cells = 0.5% of brain neurons; ~4 ppm of synapses. Path continues through Y100.

Vision: SIDRA and Neuron Mimicry

SIDRA does not imitate the neuron directly — doing so means biomimetic analog circuits (Carver Mead’s “Neuromorphic Engineering”, 1989 onward). SIDRA’s choice is different: imitate the synapse, build the neuron classically.

Y1 (today): 419M memristors = synaptic weight matrix. Neuron function sits outside (CMOS ADC + accumulator).
Y3 (2027): 1B memristors. Simple spike integrator (LIF mini-circuit) added per crossbar. Spike-based inference becomes possible.
Y10 (2029): 10B memristors. Analog LIF neurons + STDP learning on-chip. Online learning prototype.
Y100 (2031+): 100B memristors ≈ brain neuron count. Fully analog inference + learning. 100 W target — 5× over the brain but 1000× better than a digital GPU.
Y1000 (long horizon): bio-compatible organic synapse (PEDOT:PSS, chapter 3.7) + direct integration with living tissue. Brain-chip interface.

Strategic lesson for Türkiye: neuromorphic computing is the only way out of the classical silicon race — if you can’t reach 7 nm EUV, you can still lead with 28 nm + HfO₂ memristors. SIDRA is doing exactly that.

An unexpected horizon: spike-to-spike cognitive interface. A spike-native implant (unlike Neuralink, analog), talking directly to SIDRA’s spike-native fabric. 2035+ timeline.

Prerequisites

What you'll learn here

🪝 Hook: A 20-Watt Supercomputer

🧭 Intuition: Four Parts, One Job

📐 Formalism: Membrane Voltage and the Spike

🧪 Experiment: Simulate One LIF Neuron

📝 Quick Quiz

🛠️ Lab Exercise

🗂️ Cheat Sheet

🔮 Vision: SIDRA and Neuron Mimicry

📚 Further Reading