Resistance and Ohm's Law

Hook: The Smallest Equation Behind the Biggest Chip

In 1827 Georg Simon Ohm, with a wire, a battery, and a galvanometer, discovered: double the voltage, double the current. Equation: $V = I \cdot R$ . Three letters, one multiplication.

Two centuries later, SIDRACHIP Y10 has 1.04 trillion memristors doing trillions of multiplications per second using that same equation. Same physics. Same formula. Scale changed.

This chapter shows why that one-liner is the foundation of all analog AI computing.

Intuition: Current = Voltage × Conductance

Instead of resistance $R$ , use conductance $G = 1/R$ — multiplication becomes clearer:

I = V \cdot G

A memristor stores a programmable $G$ . Apply voltage $V$ → output $I = V \cdot G$ . One multiply, one cell, electrically.

Connect two memristors to the same output line. Kirchhoff’s Current Law (KCL): currents into a node sum to currents out. The two memristor currents add on the wire automatically:

I_{\text{total}} = V_1 G_1 + V_2 G_2

Connect 256 memristors to the same line? Total current = 256-term dot product. 256 such columns in parallel? 256 dot products → a matrix-vector multiply (MVM).

No “transport”. No “walking”. Just Ohm + Kirchhoff.

Formalism: Ohm + Kirchhoff → MVM

L1 · Intro

Three laws, three sentences:

Ohm: $I = V/R$ — current ∝ voltage, inversely ∝ resistance.
KCL: currents entering a node equal currents leaving.
KVL: voltage drops around any closed loop sum to zero.

With just these three rules you can build 90% of modern electronics.

L2 · Full

Let a memristor’s conductance be $G = 1/R$ ; with voltage $V$ across it, current $I = V \cdot G$ .

An $N \times M$ crossbar has a memristor at every $(i, j)$ intersection, conductance $G_{ij}$ . Apply $V_i$ on row $i$ . Total current at column $j$ (by KCL):

I_j = \sum_{i=1}^{N} V_i \cdot G_{ij}

That is exactly the definition of a matrix-vector product: $\mathbf{I} = \mathbf{G}^\top \mathbf{V}$ .

Energy: one MAC costs ~ $V \cdot I \cdot t$ . At 256×256 with $V = 0.1$ V, $G = 1$ µS, $t = 10$ ns → ~ $10^{-17}$ J = 10 aJ per cell. ~300,000× less than a digital 32-bit FMAC.

Resistance range: > 100 MΩ → current too small (lost in meter noise). < 1 kΩ → too much current, chip overheats. SIDRA window: ~10 kΩ – 1 MΩ (G = 1 µS – 100 µS).

L3 · Deep

Linearity limit: real memristors are not linear — ohmic at low bias, Schottky/tunneling rollover at high bias. Analog MVM runs in the linear regime (read voltage $V_{read} \sim 0.1$ -0.3 V). Program voltage (~2 V) uses a separate path.

Temperature dependence: $G(T) = G_0 \exp(-E_a / kT)$ . HfO₂ has $E_a \sim 0.3$ eV. +10°C ≈ +10% drift. SIDRA compensates with periodic refresh + on-die temperature sensing.

Noise (deep-dive in 5.10): thermal (Johnson-Nyquist), shot, 1/f (flicker), RTN (random telegraph). Each adds stddev to $I = VG$ . These set the accuracy ceiling of analog MVM.

Column readout: converting analog current to digital is expensive. SIDRA uses a TDC (Time-to-Digital Converter) at 6-bit, 3.125 ps — not an ADC. Current charges a capacitor, time is measured. 10-30× power/area win.

Experiment: 3×3 Mini Crossbar

Below is a mini crossbar with 3 input voltages and 9 memristor conductances. Move the sliders; column currents update live per the formula.

Try:

Zero all weights (expand “G matrix”), set one cell to 10 µS. Only that column should show current.
Zero all V’s — currents must be zero (V = 0 → I = 0).
V₁ = 1.0, others 0: column currents track only row 1’s weights.
Multiply and add on paper; compare against the display.

Quiz

1/5Ohm's law links which three quantities?

Lab Task: 4×4 MVM by Hand

Pen-and-paper. 4×4 crossbar with conductances (µS):

G = \begin{pmatrix} 2 & 1 & 3 & 0 \\ 0 & 4 & 1 & 2 \\ 5 & 2 & 0 & 3 \\ 1 & 1 & 4 & 2 \end{pmatrix}

Input voltages: $V = (0.5, 1.0, 0.5, 0.0)$ V.

(a) Compute column 1 current. (b) Find the full output current vector. (c) How many clock cycles would a single-ALU CPU need for the same work?

Answers

(a) $I_1 = 0.5·2 + 1.0·0 + 0.5·5 + 0.0·1 = 1 + 0 + 2.5 + 0 = 3.5$ µA.

(b) $I_2 = 0.5·1 + 1.0·4 + 0.5·2 + 0.0·1 = 5.5$ . $I_3 = 0.5·3 + 1.0·1 + 0.5·0 + 0.0·4 = 2.5$ . $I_4 = 0.5·0 + 1.0·2 + 0.5·3 + 0.0·2 = 3.5$ . Vector: $(3.5, 5.5, 2.5, 3.5)$ µA.

(c) 4×4 MVM = 16 multiplies + 12 adds = 28 ops. On a single-ALU CPU: ~28 cycles. Crossbar: 1. 28× faster, 100× more efficient.

Cheat Sheet

Ohm: $V = IR$ ⟺ $I = VG$ (G = 1/R, unit: siemens).
KCL: currents sum at a node (in = out).
Analog MVM: column = $I_j = \sum_i V_i G_{ij}$ . One clock cycle, analog.
Energy: ~10 aJ per cell (10⁵× under digital FMAC).
SIDRA resistance range: ~10 kΩ – 1 MΩ (G = 1-100 µS).
Linearity window: read $V_{read} = 0.1$ -0.3 V; program voltage is separate (~2 V).
Noise floor: thermal, shot, 1/f, RTN — they cap analog accuracy.

Vision: Beyond Classical Conduction

Ohm’s law has held since 1827, but new regimes exist:

Quantized conductance: in nanowires, $G = n \cdot G_0$ ( $G_0 = 2e^2/h \approx 77.5$ µS). Single-atom contact research.
Superconductors: zero resistance; critical for cryogenic (4 K) quantum-hybrid AI accelerators.
Topological conduction: surface electrons travel long distances without scattering — low-power interconnect candidate.
Photonic MVM: Lightmatter replaces Ohm with interfering light. Multiply-accumulate with no electrical current.
Moiré-lattice memristors: tunable G in twisted bilayers; an alternative analog-weight cell to SIDRA.
Ballistic transport: channel length below the mean free path → non-ohmic regime, seen in 2D materials.
Hopping conduction: hops between localized states in amorphous oxides — the source of memristor LRS/HRS noise.
Phonon-drag transport: acoustic phonons drag electrons; usable as a temperature-field sensor.

Biggest lever for post-Y10 SIDRA: a photonic crossbar hybrid — MVM via MZI (Mach-Zehnder) or micro-ring resonators, with electricity only for weight programming. 100× bandwidth, 10× lower power. Lightmatter / Neurophos target 2027 commercial.

Resistance and Ohm's Law

Prerequisites

What you'll learn here

Hook: The Smallest Equation Behind the Biggest Chip

Intuition: Current = Voltage × Conductance

Formalism: Ohm + Kirchhoff → MVM

Experiment: 3×3 Mini Crossbar

Quiz

Lab Task: 4×4 MVM by Hand

Cheat Sheet

Vision: Beyond Classical Conduction

Further Reading

Prerequisites

What you'll learn here

🪝 Hook: The Smallest Equation Behind the Biggest Chip

🧭 Intuition: Current = Voltage × Conductance

📐 Formalism: Ohm + Kirchhoff → MVM

🧪 Experiment: 3×3 Mini Crossbar

📝 Quiz

🛠️ Lab Task: 4×4 MVM by Hand

🗂️ Cheat Sheet

🔮 Vision: Beyond Classical Conduction

📚 Further Reading

Hook: The Smallest Equation Behind the Biggest Chip

Intuition: Current = Voltage × Conductance

Formalism: Ohm + Kirchhoff → MVM

Experiment: 3×3 Mini Crossbar

Quiz

Lab Task: 4×4 MVM by Hand

Cheat Sheet

Vision: Beyond Classical Conduction

Further Reading