🔌 Module 5 · Chip Hardware · Chapter 5.2 · 14 min read

Deep Dive: The Memristor

SIDRA YILDIRIM's foundation stone — from physics to 256 levels.

Prerequisites

What you'll learn here

Summarize Chua's 1971 memristor theory and HP Labs' 2008 confirmation
Detail HfO₂ memristor filament dynamics (forming, SET, RESET)
Compare 1T1R, 1S1R, 1R cell structures and SIDRA's choice
Outline 256-level multi-bit weight programming techniques (ISPP)
Explain reliability metrics: endurance, retention, drift

Hook: 1971's Missing Circuit Element

In 1971 Leon Chua published a theoretical paper: Memristor — The Missing Circuit Element. There were 4 fundamental passive elements then (resistor, capacitor, inductor); Chua mathematically argued for the fourth: a resistor whose value changes with voltage — a resistor with memory.

For 37 years it stayed pure theory. In 2008 HP Labs (Strukov, Snider, Stewart, Williams) demonstrated memristive behavior in a TiO₂ thin film. The circuit world was stunned — Nature cover.

Today: the HfO₂ memristor is the main building block of SIDRA YILDIRIM. 419 million cells in Y1. This chapter covers the physics, chemistry, and how a single cell is programmed across 256 discrete levels.

Intuition: A Resistor with Memory

A classical resistor: Ohm’s law $V = IR$ . R is fixed.

Memristor: R changes, based on past current. So:

R(t) = f\left(\int_{-\infty}^{t} I(\tau) d\tau\right) = f(q(t))

R depends on total charge through the device. Push enough current one way, R drifts that direction; reverse the current and it returns. Resistance = memory.

Practical physical mechanism (HfO₂):

Cell: thin HfO₂ film (~5 nm) between two metal electrodes.
High voltage pushes O²⁻ ions to move, forming an conductive filament (a chain of oxygen vacancies).
Thicker filament → higher conductance (G = 1/R, low R, LRS = Low Resistance State).
Reverse voltage breaks the filament → high R (HRS = High Resistance State).

Three core states:

Forming: first-time high voltage (~5 V) initializes the filament. One-shot.
SET: filament grows → R drops → LRS.
RESET: filament breaks → R rises → HRS.

256 levels = different amounts of SET (partial filament). We saw quantization theory in 4.6 and synapse mapping in 3.7.

Formalism: Memristor Math and Cell Structures

L1 · Başlangıç

Chua’s original equation:

v = M(q) \cdot i

$v$ : voltage
$i$ : current
$M(q)$ : memristance (Ω), depends on charge
$q = \int i \, dt$ : cumulative charge

Inverse: $i = W(\phi) \cdot v$ , $W$ = memductance (S), $\phi = \int v \, dt$ = cumulative magnetic flux.

HfO₂ practice:

Typical R range: 1 kΩ (LRS) to 1 MΩ (HRS), ratio 10³.

For 256 levels:

LRS: ~10 kΩ (G = 100 µS).
HRS: ~1 MΩ (G = 1 µS).
254 intermediate levels: partial filament.

Voltage thresholds:

Read voltage: ±0.1-0.3 V (no effect).
SET threshold: ~+1.5 V.
RESET threshold: ~-1.5 V.
Forming: ~+3-5 V (one-time).

Pulse parameters (typical SIDRA Y1):

Read pulse: 0.25 V, 10 ns.
SET pulse: 1.5 V, 100 ns.
RESET pulse: -1.5 V, 100 ns.

L2 · Tam

Three cell structures:

1. 1R (one resistor):

Just memristor + 2 electrodes. Simplest. But sneak path problem: current bleeds through half-selected cells.

   bit-line (+V)
       |
      [R]
       |
   word-line (0V)

Pro: maximum density, smallest area. Con: no selectivity in a crossbar.

2. 1T1R (one transistor + one resistor):

A series MOS transistor added to each memristor. Word-line gate selects the cell.

   bit-line
       |
      [R]
       |
      [T]── word-line (gate)
       |
   source line

Pro: strict selectivity, no sneak path. Con: 2 devices per cell → 2-3× area.

SIDRA Y1 chooses 1T1R. For reliability.

3. 1S1R (one selector + one resistor):

A series selector (e.g., NbOx OTS, chapter 2.3) on each memristor. Below threshold the selector is closed → no sneak path.

   bit-line
       |
      [R]
       |
      [S] (OTS NbOx)
       |
   word-line

Pro: no transistor → smaller → 3D stacking possible. Con: OTS wear-out, retention is harder.

SIDRA Y10+ target: 1S1R 3D-stack. To raise density.

Comparison:

Structure	Cell area	Sneak path	Manufacturing	SIDRA roadmap
1R	Smallest (1F²)	Present	Easy	Y1000 dream
1T1R	Medium (~6F²)	Absent	Moderate	Y1 production
1S1R	Small (~4F²)	Mostly absent	Hard (OTS)	Y10+ planned

F = minimum feature size (28 nm at Y1, 7 nm target at Y10).

L3 · Derin

ISPP (Incremental Step Pulse Programming):

To hit 256 levels, iterative programming per cell:

1. Set target G_target.
2. Apply small SET pulse (pulse width grows each iteration).
3. Read: measure G_actual.
4. If G_actual < G_target: continue.
5. If G_actual >= G_target: stop.
6. Error < threshold (1 µS) → success.

Typically 5-15 iterations. Total programming time: 100-500 ns/cell. A full crossbar (65K cells) programs in ~10-50 ms (sequential).

Calibration:

Temperature effect: G(T) Arrhenius. T measured during ISPP, target adjusted.
Cell-to-cell variation: not all cells respond identically. Per-cell calibration.

Endurance (cycle life):

Each SET/RESET shifts filament atoms → fatigue accumulates. Typical HfO₂: 10⁶-10⁹ cycles. Y1 target: 10⁶ (more than enough for inference).

Retention:

A programmed cell loses conductance over time (drift). Typical: ~10% drift over 10 years at 85°C. SIDRA target: $E_a > 1$ eV → 10-year retention.

Variability (cell-to-cell):

100 cells programmed identically → G distribution $\mu \pm \sigma$ , $\sigma \approx 5\%$ . ISPP brings it to ~1%.

Temperature dependence:

$G(T) = G_0 \cdot \exp(-E_a / k_B T)$ . 25°C → 85°C shifts conductance 20-50%. Temperature-aware compiler is mandatory.

Failure modes:

Stuck-LRS: filament won’t break (RESET fails).
Stuck-HRS: filament won’t form (SET fails).
Drift fail: value drifts outside spec during retention.

ECC and redundancy tolerate this (chapter 5.8).

SIDRA Y1 spec summary:

Parameter	Value
Cell size	100 nm × 100 nm (1T1R)
HfO₂ active thickness	~5 nm
Bits/cell	8 (256 levels)
LRS/HRS ratio	100×
Endurance	10⁶ cycles (Y1)
Retention	10 years @ 85°C (target)
Read energy	~0.1 pJ
SET energy	~10 pJ
Programming time	100-500 ns (with ISPP)

Experiment: Program a HfO₂ Cell to a 256-Level Target

Target: program a single memristor cell to $G_{target} = 50$ µS (mid-range).

Step 0 — start: cell in HRS, $G_0 = 1$ µS.

Step 1 — coarse SET: 1.5 V, 100 ns pulse.

Result: $G_1 = 30$ µS (filament partially grown).

Step 2 — read: 0.25 V read pulse, measure current.

Expected: $G_1 \cdot V_{read} = 30 \cdot 0.25 = 7.5$ µA.
Measured: 7.4 µA → $G_1 \approx 29.6$ µS.

Step 3 — small SET (fine adjust): 1.2 V, 50 ns.

Result: $G_2 = 42$ µS.

Step 4 — read: 10.5 µA → $G_2 = 42$ µS.

Step 5 — smaller SET: 1.0 V, 30 ns.

Result: $G_3 = 49$ µS. Close.

Step 6 — read: 12.25 µA → $G_3 = 49$ µS.

Step 7 — final fine adjust: 0.9 V, 20 ns.

Result: $G_4 = 50.2$ µS. Target hit (error < 1 µS).

Total: 4 SET pulses + 4 reads = 8 ops × ~50 ns = 400 ns total. Approximate ISPP duration.

Full crossbar (65K cells):

Sequential: 65K × 400 ns = 26 ms. Slow.

Parallel programming:

Same column / different rows can’t be parallel (current conflict).
Same row / different columns can be parallel (256 cells per row).
Total: 256 columns × 400 ns = 100 µs per crossbar.

For Y1, 6400 crossbars × 100 µs = 640 ms total programming. Half-second model load. After inference starts, non-volatile → no reload.

Quick Quiz

1/6Defining property of a memristor?

Lab Exercise

SIDRA Y1 vs NAND flash (Mythic AI) memristor comparison.

SIDRA Y1 HfO₂:

Bits/cell: 8 (256 levels).
Read energy: ~0.1 pJ.
SET energy: ~10 pJ.
Endurance: 10⁶.
Retention: 10 years @ 85°C.

Mythic NAND flash (analog):

Bits/cell: 8 (~256 levels).
Read energy: ~1 pJ (10× larger).
Programming energy: ~100 pJ (10× larger).
Endurance: 10⁵ (10× lower).
Retention: 10 years @ 25°C (temperature-sensitive).

Questions:

(a) Programming energy for the same 419M cells in either tech? (b) Read energy for one 256-input MVM in either tech? (c) For 1 billion inferences (inference-heavy), which wins? (d) For 1000-epoch training simulation (each parameter updated 10⁵ times), which wins? (e) Practical advantages of SIDRA HfO₂?

Solutions

(a) SIDRA: 419M × 10 pJ = 4.19 J. Mythic flash: 419M × 100 pJ = 41.9 J. SIDRA 10× less energy for model load. Either way one-time (non-volatile after load).

(b) Per MVM 256 reads: SIDRA: 256 × 0.1 pJ = 25.6 pJ. Mythic: 256 × 1 pJ = 256 pJ. SIDRA 10× per MVM.

(c) 10⁹ inferences (each ~10 MVMs): SIDRA: 10¹⁰ × 25.6 pJ = 256 mJ. Mythic: 10¹⁰ × 256 pJ = 2.56 J. SIDRA 10× more efficient, critical for edge devices.

(d) Training 10⁵ × parameter updates = 4.19 × 10¹³ programs × 10 pJ (SIDRA) = 419 kJ. SIDRA endurance 10⁶ → 10× wear-out, cells die. Mythic: 4.19 × 10¹⁴ × 100 pJ = 41.9 MJ + endurance 10⁵ → more wear. Both weak at training, but SIDRA is less bad.

(e) SIDRA HfO₂ advantages: (1) CMOS-process compatible (Mythic NAND has its own process), (2) temperature-tolerant (memristor consistent at 125°C; flash retention struggles above 70°C), (3) fast SET (100 ns vs 10 µs), (4) high density (1T1R compact), (5) low voltage (1.5 V SET vs 15 V flash).

Cheat Sheet

Memristor: R = f(past charge). Chua 1971 theory, HP Labs 2008 confirmation.
HfO₂ filament: O²⁻ vacancy chain. SET grows, RESET breaks it.
3 cell structures: 1R (sneak path), 1T1R (Y1 choice), 1S1R (Y10+).
256 levels: ISPP achieves ~1% error.
Voltage thresholds: read 0.25 V, SET +1.5 V, RESET -1.5 V.
Endurance: 10⁶-10⁹ cycles.
Retention: 10 years @ 85°C (target).
Y1 spec: 100 nm cell, 8 bit, 0.1 pJ read, 10 pJ SET, 100 µs/crossbar program.

Vision: The Memristor Future — More Bits, Less Energy

Memristor technology is in early maturity. SIDRA’s roadmap advances each generation:

Y1 (today): HfO₂, 256 levels, 100 nm. In production.
Y3 (2027): HfAlO doping → 1024 levels (10 bits), 70 nm. Endurance 10⁷.
Y10 (2029): Hybrid HfO₂ + ferroelectric HZO. 4096 levels (12 bits), 28 nm. 1S1R 3D stack.
Y100 (2031+): 2D heterostructure (MoS₂, hBN). 16-bit analog, 7 nm. Optical interconnect (photonic).
Y1000 (long horizon): Organic PEDOT:PSS synapse, bio-compatible. Brain implant.

Meaning for Türkiye: memristor materials and fab infrastructure are the real territory of semiconductor sovereignty. We can’t get ASML EUV but a HfO₂ ALD reactor + workshop-class cleanroom can be built in Türkiye. SIDRA YILDIRIM is the first concrete output of that infrastructure.

Unexpected future: the quantum memristor. Single-electron control inside a quantum dot → quantum-coherent memristor. Foundation for superconducting AI chips. Possible hybrid quantum-classical on a photonic SIDRA Y100. 2035+ horizon.

Prerequisites

What you'll learn here

🪝 Hook: 1971's Missing Circuit Element

🧭 Intuition: A Resistor with Memory

📐 Formalism: Memristor Math and Cell Structures

🧪 Experiment: Program a HfO₂ Cell to a 256-Level Target

📝 Quick Quiz

🛠️ Lab Exercise

🗂️ Cheat Sheet

🔮 Vision: The Memristor Future — More Bits, Less Energy

📚 Further Reading