The ISPP Algorithm, Step by Step

Core ISPP firmware code:

typedef struct {
    uint32_t cell_addr;
    int target_g;           // µS × 100 (fixed-point)
    int tolerance;          // ±µS × 100
    int max_iterations;     // typically 15
} ispp_params_t;

int ispp_program_cell(ispp_params_t *p) {
    int pulse_voltage = INITIAL_VOLTAGE;  // mV (1500 = 1.5V)
    int pulse_width   = INITIAL_WIDTH;    // ns (10)
    
    for (int i = 0; i < p->max_iterations; i++) {
        apply_set_pulse(p->cell_addr, pulse_voltage, pulse_width);
        int g_actual = read_cell(p->cell_addr);
        int error = p->target_g - g_actual;
        
        if (abs(error) < p->tolerance) {
            return ISPP_SUCCESS;
        }
        
        if (error > 0) {
            // SET stronger
            pulse_voltage += 50;        // +50 mV
            pulse_width = pulse_width * 12 / 10;  // +20%
            
            // Saturate
            if (pulse_voltage > MAX_VOLTAGE) pulse_voltage = MAX_VOLTAGE;
            if (pulse_width > MAX_WIDTH) pulse_width = MAX_WIDTH;
        } else {
            // Overshoot → small RESET
            apply_reset_pulse(p->cell_addr, -500, 5);  // -0.5V, 5ns
            pulse_voltage = INITIAL_VOLTAGE;  // reset
            pulse_width = INITIAL_WIDTH;
        }
    }
    
    return ISPP_FAIL;
}

Adaptive pulse strategy:

First few iterations aggressive (large step). As we approach the target, small steps. Logarithmic convergence.

// Pulse width by error magnitude
if (error > 50) pulse_width = 100;   // big step
else if (error > 20) pulse_width = 50;
else if (error > 5) pulse_width = 20;
else pulse_width = 10;  // fine tune

Crossbar parallel programming:

256 cells in the same row can be programmed in parallel. Same pulse applied; BL control selects which cells receive it.

void program_row(int row, int targets[256]) {
    int active[256] = {1, 1, ..., 1};  // all cells active
    
    for (int iter = 0; iter < 15; iter++) {
        // Pulse to all active cells
        apply_row_pulse(row, active, voltage, width);
        
        // Read all
        int reads[256];
        read_row(row, reads);
        
        // Per-cell check
        bool all_done = true;
        for (int col = 0; col < 256; col++) {
            if (active[col] && abs(reads[col] - targets[col]) < tolerance) {
                active[col] = 0;  // this cell done
            } else if (active[col]) {
                all_done = false;
            }
        }
        
        if (all_done) return;
        
        // Pulse adjust
        voltage += 50;
        width = width * 12 / 10;
    }
}

Time: 256 cells parallel → ~16 iterations × 50 ns = 800 ns/row. 256 rows × 800 ns = 200 µs/crossbar.

ISPP fail handling:

After 15 iterations without success:

1. Cell is stuck-LRS or stuck-HRS.
2. Add to failure map.
3. ECC remaps to a redundant cell.
4. Compiler knows; writes the weight to another cell.

Y1 ISPP fail rate: 0.5%. Manageable.

Closed-loop ISPP (Y10 target):

Classic ISPP: pulse → wait → measure. Closed-loop: measure during the pulse, stop instantly.

Pros:

• 30% time reduction.
• Higher precision (less overshoot).

Cons:

• More complex circuitry.

Tested in Y10 prototype.

Temperature compensation:

G(T) Arrhenius. Per-crossbar thermal sensor → firmware applies correction:

int g_target_corrected = g_target * exp_lookup(Ea / (k * T));

ISPP runs against the corrected target. Drift drops.

Compiler ↔ ISPP API:

Driver IOCTL LOAD_MODEL:

struct model_data {
    weight_t weights[N];     // FP32 weights
    int n_layers;
    layer_info_t layers[N_LAYERS];
};

Firmware:

1. Compiler-quantized weights are received.
2. Map to cells (cluster, CU, crossbar, row, col).
3. Program each cell with ISPP.
4. Update failure map.
5. Signal “model loaded” to driver.

Performance:

Y1 model load:

• 419M cells × 800 ns / 256 (parallel) = 1.3 seconds.
• Practical: ~640 ms (some clusters parallel).

Initial inference latency ~1 second. Done once.